< BK21 플러스 BEST 정보기술 사업단 세미나 개최 안내 >

개최일시 : 2016년 01월 05일 화요일 14:00 ~ 15:30

개최장소 : C716

세미나 제목 : DUANG: Lightweight Page Migration and Adaptive Asymmetry in Memory System

발표초록 : The main memory systems have gone through dramatic in-creases in bandwidth and capacity over technology generations. In contrast, their random access latency has remained relatively constant. For given memory technology, optimizing the latency typically requires sacrificing the total capacity and density (i.e., cost per bit), which are the two most critical concerns for memory industry. Therefore, recent studies have proposed memory architecture comprised of asymmetric (fast, low-capacity and slow, high-capacity) regions to optimize between overall latency and negative impact on the capacity and density. Such memory architecture, however, presents a unique challenge, requiring frequently-accessed pages to be placed in the fast region. Otherwise, an expensive page migration is required. In this paper, we propose a novel memory architecture sharing a set of row buffers between a pair of neighboring banks for resistive memories. This shared row-buffer architecture enables two techniques. First, the shared row buffers provide a vehicle for migrating pages between slow and fast banks with minimal overhead. Second, the shared row buffers can be dynamically partitioned between the two banks based on the memory access patterns, i.e., allocating more row buffers to busy banks. With an asymmetric memory architecture that aims to increase capacity with high-density slow banks while maintaining high performance with low-density fast banks, our shared row-buffer architecture can help capture 94%~97% of the potential performance of a memory architecture comprised of only fast banks.

강연자 : Nam Sung Kim, Ph.D. Associate Professor, IEEE Fellow, Electrical and Computer Engineering, University of Illinois, Urbana-Champaign

초청자 : 전기전자공학과 교수 노원우